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FEATURES Flexible Configuration Differential Input and Output Driver or Two Single-Ended Drivers Industrial Temperature Range High Output Power Thermally Enhanced SOIC 400 mA Minimum Output Drive/Amp, RL = 10 Low Distortion -66 dB @ 1 MHz THD, RL = 200 , V OUT = 40 V p-p 0.05% and 0.45 Differential Gain and Phase, R L = 25 (6 Back-Terminated Video Loads) High Speed 120 MHz Bandwidth (-3 dB) 900 V/ s Differential Slew Rate 70 ns Settling Time to 0.1% Thermal Shutdown APPLICATIONS ADSL, HDSL, and VDSL Line Interface Driver Coil or Transformer Driver CRT Convergence and Astigmatism Adjustment Video Distribution Amp Twisted Pair Cable Driver GENERAL DESCRIPTION
High Output Current Differential Driver AD815
FUNCTIONAL BLOCK DIAGRAM
NC 1 NC 2 NC 3 NC 4 5 THERMAL HEAT TABS +VS* 6 24 NC 23 NC 22 NC 21 NC
AD815
20 THERMAL HEAT TABS +VS*
TOP VIEW 19 7 (Not to Scale) 18 8 17
+IN1 9 -IN1 10 OUT1 11 -VS 12
16 +IN2 15 -IN2 14 OUT2 13 +VS
NC = NO CONNECT *HEAT TABS ARE CONNECTED TO THE POSITIVE SUPPLY.
combined with the wide bandwidth and high current drive make the differential driver ideal for communication applications such as subscriber line interfaces for ADSL, HDSL and VDSL. The AD815 differential slew rate of 900 V/s and high load drive are suitable for fast dynamic control of coils or transformers, and the video performance of 0.05% and 0.45 differential gain and phase into a load of 25 enable up to 12 back-terminated loads to be driven. The 24-lead SOIC (RB) is capable of driving 26 dBm for full rate ADSL with proper heat sinking.
+15V 100
The AD815 consists of two high speed amplifiers capable of supplying a minimum of 500 mA. They are typically configured as a differential driver enabling an output signal of 40 V p-p on 15 V supplies. This can be increased further with the use of a coupling transformer with a greater than 1:1 turns ratio. The low harmonic distortion of -66 dB @ 1 MHz into 200
-40 TOTAL HARMONIC DISTORTION - dBc -50 -60 -70 -80 -90 -100 RL = 50 (DIFFERENTIAL) VS = 15V G = +10 VOUT = 40V p-p
1/2 AD815 AMP1
499
R1 = 15
VIN = 4Vp-p
110
G = +10 499
VD = 40Vp-p
RL 120
VOUT = 40Vp-p
100
AMP2 1/2 AD815
-15V
R2 = 15 1:2 TRANSFORMER
RL = 200 (DIFFERENTIAL)
Figure 2. Subscriber Line Differential Driver
-110 100 1k 10k 100k FREQUENCY - Hz 1M 10M
Figure 1. Total Harmonic Distortion vs. Frequency
REV. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/461-3113 (c) 2005 Analog Devices, Inc. All rights reserved.
AD815-SPECIFICATIONS (@ T = +25 C, V =
A S
15 V dc, RFB = 1 k
and RLOAD = 100
VS 15 5 15 5 15 15 15 5, 15 5, 15 5, 15 15 15 5 15 Min 100 90
unless otherwise noted)
AD815A Typ Max 120 110 40 10 900 70 -66 1.85 1.8 19 0.05 0.45 5 10 20 0.5 0.5 10 10 2 10 8 15 30 2 4 5 90 150 5 5 75 100 Units MHz MHz MHz MHz V/s ns dBc nV/Hz pA/Hz pA/Hz % Degrees mV mV mV V/C mV mV mV V/C A A A A A A M M M pF V V dB dB V V V V mA A dB 18 30 40 40 55 V mA mA mA mA dB
Model DYNAMIC PERFORMANCE Small Signal Bandwidth (-3 dB) Bandwidth (0.1 dB) Differential Slew Rate Settling Time to 0.1% NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion Input Voltage Noise Input Current Noise (+I IN) Input Current Noise (-I IN) Differential Gain Error Differential Phase Error DC PERFORMANCE Input Offset Voltage
Conditions G = +1 G = +1 G = +2 G = +2 VOUT = 20 V p-p, G = +2 10 V Step, G = +2 f = 1 MHz, RLOAD = 200 , VOUT = 40 V p-p f = 10 kHz, G = +2 (Single Ended) f = 10 kHz, G = +2 f = 10 kHz, G = +2 NTSC, G = +2, RLOAD = 25 NTSC, G = +2, RLOAD = 25
800
TMIN - TMAX Input Offset Voltage Drift Differential Offset Voltage TMIN - TMAX Differential Offset Voltage Drift -Input Bias Current TMIN - TMAX +Input Bias Current TMIN - TMAX Differential Input Bias Current TMIN - TMAX Open-Loop Transresistance TMIN - TMAX INPUT CHARACTERISTICS Differential Input Resistance Differential Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio Differential Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Voltage Swing TMIN - TMAX TMIN - TMAX Single Ended, R LOAD = 25 Differential, R LOAD = 50 TMIN - TMAX RLOAD = 10 +Input -Input 15 15 15 5 5, 15 5, 15 15 5 15 15 15 15 15 15 5 15 5 15 5, 15 5, 15 5, 15 5, 15 5, 15 1.0 0.5 5 15
5.0
57 80 11.0 1.1 21 22.5 400
7 15 1.4 13.5 3.5 65 100 11.7 1.8 23 24.5 500 1.0 13 -65
Output Current1 RB-24 Short Circuit Current Output Resistance MATCHING CHARACTERISTICS Crosstalk POWER SUPPLY Operating Range2 Quiescent Current
f = 1 MHz TMIN - TMAX TMIN - TMAX
23 30
Power Supply Rejection Ratio
TMIN - TMAX
-55
-66
NOTES 1 Output current is limited in the 24-lead SOIC package to the maximum power dissipation. See absolute maximum ratings and derating curves. 2 Observe derating curves for maximum junction temperature. Specifications subject to change without notice.
-2-
REV. C
AD815
ABSOLUTE MAXIMUM RATINGS 1 MAXIMUM POWER DISSIPATION
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Total Internal Power Dissipation2 Small Outline (RB) . . 2.4 Watts (Observe Derating Curves) Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . 6 V Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves Can Only Short to Ground Storage Temperature Range RB Package . . . . . . . . . . . . . . . . . . . . . . . -65C to +125C Operating Temperature Range AD815A . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C Lead Temperature Range (Soldering, 10 sec) . . . . . . . . 300C
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air with 0 ft/min air flow: 24-Lead Surface Mount: JA = 52C/W.
The maximum power that can be safely dissipated by the AD815 is limited by the associated rise in junction temperature. The maximum safe junction temperature for the plastic encapsulated parts is determined by the glass transition temperature of the plastic, about 150C. Exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175C for an extended period can result in device failure. The AD815 has thermal shutdown protection, which guarantees that the maximum junction temperature of the die remains below a safe level, even when the output is shorted to ground. Shorting the output to either power supply will result in device failure. To ensure proper operation, it is important to observe the derating curves and refer to the section on power considerations. It must also be noted that in high (noninverting) gain configurations (with low values of gain resistor), a high level of input overdrive can result in a large input error current, which may result in a significant power dissipation in the input stage. This power must be included when computing the junction temperature rise due to total internal power.
14 13 12 11 10 9 8 7 6 5 4 3 2 1 TJ = 150 C
PIN CONFIGURATION 24-Lead Thermally-Enhanced SOIC (RB-24)
NC 1 NC 2 NC 3 NC 4 5 THERMAL HEAT TABS +VS* 6 24 NC 23 NC 22 NC 21 NC
AD815
20 19 THERMAL HEAT TABS +VS*
TOP VIEW 7 (Not to Scale) 18 8 17
+IN1 9 -IN1 10 OUT1 11 -VS 12
16 +IN2 15 -IN2 14 OUT2 13 +VS
MAXIMUM POWER DISSIPATION - Watts
JA = 52 C/W
(STILL AIR = 0 FT/MIN) NO HEAT SINK AD815ARB-24 70 80 90
NC = NO CONNECT *HEAT TABS ARE CONNECTED TO THE POSITIVE SUPPLY.
0 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 AMBIENT TEMPERATURE - C
Figure 3. Plot of Maximum Power Dissipation vs. Temperature
ORDERING GUIDE Model Option AD815ARB-24 AD815ARB-24-REEL Temperature Range -40C to +85C -40C to +85C Package Description 24-Lead Thermally Enhanced SOIC 24-Lead Thermally Enhanced SOIC Package RB-24 RB-24
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD815 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. C
-3-
AD815-Typical Performance Characteristics
20 36 34 VS = 15V 15 32
COMMON-MODE VOLTAGE RANGE -
Volts
SUPPLY CURRENT - mA
30 28 26 VS = 24 22 20 5V
10
5
0
0
5
10 SUPPLY VOLTAGE -
15 Volts
20
18 -40
-20
0 20 40 60 JUNCTION TEMPERATURE - C
80
100
Figure 4. Input Common-Mode Voltage Range vs. Supply Voltage
Figure 7. Total Supply Current vs. Temperature
40
80
33
DIFFERENTIAL OUTPUT VOLTAGE - V p-p
SINGLE-ENDED OUTPUT VOLTAGE - V p-p
TOTAL SUPPLY CURRENT - mA
TA = +25 C 30
30 NO LOAD
60
27
20
RL = 50 (DIFFERENTIAL) RL = 25 (SINGLE-ENDED)
40
24
10
20
21
0 0 5 10 SUPPLY VOLTAGE - 15 Volts
0 20
18 0 2 4 6 8 10 12 SUPPLY VOLTAGE - Volts 14 16
Figure 5. Output Voltage Swing vs. Supply Voltage
Figure 8. Total Supply Current vs. Supply Voltage
30
SINGLE-ENDED OUTPUT VOLTAGE - Volts p-p
60 VS = 15V 50
DIFFERENTIAL OUTPUT VOLTAGE - Volts p-p
10 0
INPUT BIAS CURRENT - A
SIDE A, B VS = 15V,
+I B 5V
25
-10 -20 -30 -40 -50 -60 SIDE A -70 VS = -80 -40 -20 0 20 40 60 JUNCTION TEMPERATURE - C 80 SIDE B -I B 15V 100 VS = 5V
20
40
15
30
SIDE B -I B SIDE A
10 VS = 5 5V
20
10
0 10 100 LOAD RESISTANCE - (Differential -
1k ) (Single-Ended -
0 10k /2)
Figure 6. Output Voltage Swing vs. Load Resistance
Figure 9. Input Bias Current vs. Temperature
-4-
REV. C
AD815
0 -2
80 TA = 25 C 60 40 VS = 15V VS = 10V VS = 5V VIN f = 0.1Hz 100 49.9 -40 1k -60 -2.0 -1.6 -1.2 0 -0.8 -0.4 0.4 0.8 LOAD CURRENT - Amps 1k
INPUT OFFSET VOLTAGE - mV
VS = -6 -8 -10 VS = -12 -14 -40 15V
5V
RTI OFFSET - mV
-4
20 0 -20
1/2 AD815
VOUT RL= 5
-20
0 20 40 60 JUNCTION TEMPERATURE - C
80
100
1.2
1.6
2.0
Figure 10. Input Offset Voltage vs. Temperature
Figure 13. Thermal Nonlinearity vs. Output Current Drive
750 VS = 15V
100
SHORT CIRCUIT CURRENT - mA
700 SOURCE 650
CLOSED-LOOP OUTPUT RESISTANCE -
10
VS =
5V
600 SINK 550
1
VS =
15V
0.1
500
0.01
450 -60
-40
-20
0 20 40 60 80 100 JUNCTION TEMPERATURE - C
120
140
30k
100k
300k
1M 3M 10M FREQUENCY - Hz
30M
100M
300M
Figure 11. Short Circuit Current vs. Temperature
Figure 14. Closed-Loop Output Resistance vs. Frequency
15 TA = 25 C RL = 25 VS =
RTI OFFSET - mV
VS = 5V
10V VS = 15V
DIFFERENTIAL OUTPUT VOLTAGE - V p-p
40
10
TA = 25 C VS = 15V RL = 100
5
30 RL = 50 20 RL = 25 10 RL = 1 0 0 2 4 10 8 6 FREQUENCY - MHz 12 14
0 VIN f = 0.1Hz 100 49.9
-5
1/2 AD815
VOUT RL= 25
-10 1k -15 -20
1k
-16
-12
-8
-4 0 4 VOUT - Volts
8
12
16
20
Figure 12. Gain Nonlinearity vs. Output Voltage
Figure 15. Large Signal Frequency Response
REV. C
-5-
AD815
100 100
120 110 VOLTAGE NOISE - nV/Hz CURRENT NOISE - pA/Hz TRANSIMPEDANCE
TRANSIMPEDANCE - dB
INVERTING INPUT CURRENT NOISE
100 90 80 70 60 50 40 PHASE
100 500
10
10
-50 -100 -150 -200 -250 1k 10k 100k 1M FREQUENCY - Hz 10M 100M
NONINVERTING INPUT CURRENT NOISE
1 10
INPUT VOLTAGE NOISE 100 1k FREQUENCY - Hz 10k
30
1 100k
100
Figure 16. Input Current and Voltage Noise vs. Frequency
Figure 19. Open-Loop Transimpedance vs. Frequency
90
-40 TOTAL HARMONIC DISTORTION - dBc -50 -60 -70 -80 -90 -100 -110 100 RL = 50 (DIFFERENTIAL) RL = 200 (DIFFERENTIAL) VS = 15V G = +10 VOUT = 40V p-p
COMMON-MODE REJECTION - dB
80 VS = 70 60 50 40 30 20 10 10k 562 VIN 562 562 SIDE B SIDE A 562 VOUT 15V
1/2 AD815
100k
1M FREQUENCY - Hz
10M
100M
1k
10k 100k FREQUENCY - Hz
1M
10M
Figure 17. Common-Mode Rejection vs. Frequency
Figure 20. Total Harmonic Distortion vs. Frequency
0
OUTPUT SWING FROM V TO 0 - Volts
10 VS = 15V G = +2 RL = 100 8 1% 6 4 2 0 -2 -4 -6 1% -8 0 20 60 40 70 SETTLING TIME - ns 80 100 0.1% GAIN = +2 VS = 15V 0.1%
-10 -20 -30
PSRR - dB
-40 -PSRR -50 -60 -70 -80 -90 +PSRR
-100 0.01
-10 0.1 1 10 FREQUENCY - MHz 100 300
Figure 18. Power Supply Rejection vs. Frequency
Figure 21. Output Swing and Error vs. Settling Time
-6-
REV. C
PHASE - Degrees
0
AD815
700 G = +10
SINGLE-ENDED SLEW RATE - V/ s (PER AMPLIFIER) DIFFERENTIAL SLEW RATE - V/ s
1400 1200 1000 G = +2 800 600 400 200 0 0 5 10 15 OUTPUT STEP SIZE - V p-p 20 25
OPEN-LOOP TRANSRESISTANCE - M
5
600 500 400 300 200 100 0
4 SIDE B 3 SIDE A 2 -TZ 1 SIDE B +TZ SIDE A
0 -40
-20
0 20 40 60 JUNCTION TEMPERATURE - C
80
100
Figure 22. Slew Rate vs. Output Step Size
Figure 25. Open-Loop Transresistance vs. Temperature
-85 VS = SIDE B -80 SIDE A -75 OUTPUT SWING - Volts +PSRR 15V
15 VS = 14 15V RL = 150 +VOUT | -VOUT | +VOUT 12 | -VOUT | 11 RL = 25
PSRR - dB
13
-70 SIDE A -65 SIDE B -PSRR -60 -40 -20 0 20 40 60 JUNCTION TEMPERATURE - C 80 100
10 -40
-20
0 20 40 60 JUNCTION TEMPERATURE - C
80
100
Figure 23. PSRR vs. Temperature
Figure 26. Single-Ended Output Swing vs. Temperature
-74 -73
27
26 OUTPUT SWING - Volts
-72
VS = 15V RL = 50 25 -VOUT +VOUT 24
CMRR - dB
-71 -70 -69 -CMRR -68 -67 -66 -40 +CMRR
23
-20
0 20 40 60 JUNCTION TEMPERATURE - C
80
100
22 -40
-20
0 20 40 60 JUNCTION TEMPERATURE - C
80
100
Figure 24. CMRR vs. Temperature
Figure 27. Differential Output Swing vs. Temperature
REV. C
-7-
AD815
DIFF PHASE - Degrees
6 BACK TERMINATED LOADS (25 ) 0.04 0.03 0.02 0.01 0.00 -0.01 -0.02 -0.03 -0.04 0.010 0.005 0.000 -0.005 -0.010 -0.015 -0.020 -0.025 -0.030 0.5 0.4 0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 0.12 0.10 0.08 0.06 0.04 0.02 0.00 -0.02 -0.04
DIFF GAIN - %
1 0 5V 0.1
NORMALIZED FLATNESS - dB NORMALIZED FREQUENCY RESPONSE - dB
15V
PHASE
G = +2 RF = 1k NTSC
15V
-1 -2 B A A -3 -4 -5
0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 0.1 VIN 100 49.9 499 499 100 VOUT 5V B
GAIN 1 2 3 4 5 6 7 8 9 10 11
DIFF GAIN - %
PHASE GAIN G = +2 RF = 1k NTSC PHASE 3 4 5 6 7 8 9 10 11
DIFF PHASE - Degrees
2 BACK TERMINATED LOADS (75 )
-6 -7 -8 -9 300
GAIN
1
2
1
10 FREQUENCY - MHz
100
Figure 28. Differential Gain and Differential Phase (per Amplifier)
Figure 31. Bandwidth vs. Frequency, G = +2
-10
1
NORMALIZED OUTPUT VOLTAGE - dB
-20 -30
CROSSTALK - dB
-40 -50 -60 -70
G = +2 RF = 499 VS = 15V, 5V VIN = 400mVrms RL = 100 SIDE B
VS = 0 -1 -2 -3 VIN -4
15V SIDE A SIDE B
100 49.9
VOUT 100
SIDE A -80 -90
-5 -6 -7 0.1
124
499
-100 -110 0.03
0.1
1 10 FREQUENCY - MHz
100
300
1
10 FREQUENCY - MHz
100
300
Figure 29. Output-to-Output Crosstalk vs. Frequency
Figure 32. -3 dB Bandwidth vs. Frequency, G = +5
2 1 0 VS = 15V VIN = 0 dBm SIDE A SIDE B
100 90
OUTPUT VOLTAGE - dB
-1 -2 -3 -4 -5 -6 -7 -9 0.1 49.9 562 100 VIN
100
VOUT
10 0%
5V
1s
1
10 FREQUENCY - MHz
100
300
Figure 30. -3 dB Bandwidth vs. Frequency, G = +1
Figure 33. 40 V p-p Differential Sine Wave, RL = 50 , f = 100 kHz
-8-
REV. C
AD815
562 +15V 10 F 0.1 F
8
RF +15V 10 F 0.1 F RS
8
1/2 AD815
100 VIN PULSE GENERATOR TR/TF = 250ps 50 -15V
7
1/2 AD815
0.1 F RL = 100
VIN PULSE GENERATOR TR/TF = 250ps 100
7
0.1 F 10 F -15V
RL = 100
10 F
50
Figure 34. Test Circuit, Gain = +1
SIDE A
Figure 38. Test Circuit, Gain = 1 + R F /RS
G = +1 RF = 698 RL = 100
SIDE A
G = +5 RF = 562 RL = 100 RS = 140
SIDE B
SIDE B
100mV
20ns
5V
100ns
Figure 35. 500 mV Step Response, G = +1
Figure 39. 20 V Step Response, G = +5
SIDE A
G = +1 RF = 562 RL = 100
562 +15V 10 F 0.1 F 562 VIN PULSE GENERATOR TR/TF = 250ps 55 100
7 8
SIDE B
1/2 AD815
0.1 F 10 F -15V RL = 100
1V
20ns
Figure 36. 4 V Step Response, G = +1
Figure 40. Test Circuit, Gain = -1
SIDE A
G = +1 RF = 562 RL = 100
SIDE A
G = -1 RF = 562 RL = 100
SIDE B
SIDE B
2V
50ns
100mV
20ns
Figure 37. 10 V Step Response, G = +1
Figure 41. 500 mV Step Response, G = -1
REV. C
-9-
AD815
Choice of Feedback and Gain Resistors
SIDE A G = -1 RF = 562 RL = 100
SIDE B
The fine scale gain flatness will, to some extent, vary with feedback resistance. It therefore is recommended that once optimum resistor values have been determined, 1% tolerance values should be used if it is desired to maintain flatness over a wide range of production lots. Table I shows optimum values for several useful configurations. These should be used as starting point in any application.
Table I. Resistor Values
1V
20ns
RF ( ) G= +1 -1 +2 +5 +10 562 499 499 499 1k
RG ( ) 499 499 125 110
Figure 42. 4 V Step Response, G = -1
THEORY OF OPERATION
The AD815 is a dual current feedback amplifier with high (500 mA) output current capability. Being a current feedback amplifier, the AD815's open-loop behavior is expressed as transimpedance, V O /I -IN , or T Z . The open-loop transimpedance behaves just as the open-loop voltage gain of a voltage feedback amplifier, that is, it has a large dc value and decreases at roughly 6 dB/octave in frequency. Since RIN is proportional to 1/gM, the equivalent voltage gain is just TZ x gM, where the gM in question is the transconductance of the input stage. Using this amplifier as a follower with gain, Figure 43, basic analysis yields the following result:
T Z (S ) VO =Gx VIN T Z (S ) + G x RIN + RF
PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS
As to be expected for a wideband amplifier, PC board parasitics can affect the overall closed-loop performance. Of concern are stray capacitances at the output and the inverting input nodes. If a ground plane is to be used on the same side of the board as the signal traces, a space (5 mm min) should be left around the signal lines to minimize coupling.
POWER SUPPLY BYPASSING
where:
RF RG RIN = 1/gM 25 G = 1+
RF RG RIN RN VIN
VOUT
Adequate power supply bypassing can be critical when optimizing the performance of a high frequency circuit. Inductance in the power supply leads can form resonant circuits that produce peaking in the amplifier's response. In addition, if large current transients must be delivered to the load, then bypass capacitors (typically greater than 1 F) will be required to provide the best settling time and lowest distortion. A parallel combination of 10.0 F and 0.1 F is recommended. Under some low frequency applications, a bypass capacitance of greater than 10 F may be necessary. Due to the large load currents delivered by the AD815, special consideration must be given to careful bypassing. The ground returns on both supply bypass capacitors as well as signal common must be "star" connected as shown in Figure 44.
+VS +IN
Figure 43. Current Feedback Amplifier Operation
RF RG (OPTIONAL) RF
+OUT
Recognizing that G x RIN << RF for low gains, it can be seen to the first order that bandwidth for this amplifier is independent of gain (G). Considering that additional poles contribute excess phase at high frequencies, there is a minimum feedback resistance below which peaking or oscillation may result. This fact is used to determine the optimum feedback resistance, RF. In practice parasitic capacitance at the inverting input terminal will also add phase in the feedback loop, so picking an optimum value for RF can be difficult. Achieving and maintaining gain flatness of better than 0.1 dB at frequencies above 10 MHz requires careful consideration of several issues. -10-
-IN
-OUT
-VS
Figure 44. Signal Ground Connected in "Star" Configuration
REV. C
AD815
DC ERRORS AND NOISE
There are three major noise and offset terms to consider in a current feedback amplifier. For offset errors refer to the equation below. For noise error the terms are root-sum-squared to give a net output error. In the circuit below (Figure 45), they are input offset (VIO) which appears at the output multiplied by the noise gain of the circuit (1 + RF/RG), noninverting input current (IBN x RN) also multiplied by the noise gain, and the inverting input current, which when divided between RF and RG and subsequently multiplied by the noise gain always appear at the output as IBI x RF. The input voltage noise of the AD815 is less than 2 nV/Hz. At low gains though, the inverting input current noise times RF is the dominant noise source. Careful layout and device matching contribute to better offset and drift specifications for the AD815 compared to many other current feedback amplifiers. The typical performance curves in conjunction with the equations below can be used to predict the performance of the AD815 in any application.
TJ
A (JUNCTION TO
DIE MOUNT)
B (DIE MOUNT
TA CASE TJ PIN TO CASE)
A + B = JC CA JA
TA
JC
WHERE: PIN = DEVICE DISSIPATION TA = AMBIENT TEMPERATURE TJ = JUNCTION TEMPERATURE JC = THERMAL RESISTANCE - JUNCTION TO CASE CA = THERMAL RESISTANCE - CASE TO AMBIENT
R R VOUT = VIO x 1 + F IBN x RN x 1 + F IBI x RF RG RG
RF RG I BI
Figure 46. A Breakdown of Various Package Thermal Resistances
RN
I BN
VOUT
Figure 47 gives the relationship between output voltage swing into various loads and the power dissipated by the AD815 (PIN). This data is given for both sine wave and square wave (worst case) conditions. It should be noted that these graphs are for mostly resistive (phase < 10) loads.
f = 1kHz RL = 50
Figure 45. Output Offset Voltage
4 SQUARE WAVE SINE WAVE 3 RL = 100 2 RL = 200 1
The 500 mA drive capability of the AD815 enables it to drive a 50 load at 40 V p-p when it is configured as a differential driver. This implies a power dissipation, PIN, of nearly 5 watts. To ensure reliability, the junction temperature of the AD815 should be maintained at less than 175C. For this reason, the AD815 will require some form of heat sinking in most applications. The thermal diagram of Figure 46 gives the basic relationship between junction temperature (TJ) and various components of JA.
TJ = TA + PIN JA
Equation 1
PIN - Watts
POWER CONSIDERATIONS
10
20 30 VOUT - Volts p-p
40
Figure 47. Total Power Dissipation vs. Differential Output Voltage
REV. C
-11-
AD815
Other Power Considerations
There are additional power considerations applicable to the AD815. First, as with many current feedback amplifiers, there is an increase in supply current when delivering a large peak-to-peak voltage to a resistive load at high frequencies. This behavior is affected by the load present at the amplifier's output. Figure 15 summarizes the full power response capabilities of the AD815. These curves apply to the differential driver applications (e.g., Figure 51 or Figure 55). In Figure 15, maximum continuous peak-to-peak output voltage is plotted vs. frequency for various resistive loads. Exceeding this value on a continuous basis can damage the AD815. The AD815 is equipped with a thermal shutdown circuit. This circuit ensures that the temperature of the AD815 die remains below a safe level. In normal operation, the circuit shuts down the AD815 at approximately 180C and allows the circuit to turn back on at approximately 140C. This built-in hysteresis means that a sustained thermal overload will cycle between power-on and power-off conditions. The thermal cycling typically occurs at a rate of 1 ms to several seconds, depending on the power dissipation and the thermal time constants of the package and heat sinking. Figures 48 and 49 illustrate the thermal shutdown operation after driving OUT1 to the + rail, and OUT2 to the - rail, and then short-circuiting to ground each output of the AD815. The AD815 will not be damaged by momentary operation in this state, but the overload condition should be removed.
OUT 1
100 90
a small resistor should be placed in series with each output. See Figure 50. This circuit can deliver 800 mA into loads of up to 12.5 .
499 +15V 0.1 F
5
499
10 F 1
100
4
1/2 AD815
8
6
50 499 499 RL
10
100
11
1/2 AD815
7
1
9
0.1 F -15V
10 F
Figure 50. Parallel Operation for High Current Output
Differential Operation
Various circuit configurations can be used for differential operation of the AD815. If a differential drive signal is available, the two halves can be used in a classic instrumentation configuration to provide a circuit with differential input and output. The circuit in Figure 51 is an illustration of this. With the resistors shown, the gain of the circuit is 11. The gain can be changed by changing the value of RG. This circuit, however, provides no common-mode rejection.
+15V
+IN
OUT 2
10 0%
100
4
0.1 F
10 F OUT 1
1/2 AD815
8
6
5
RF 499 RL RF 499 VOUT
5V
200 s
VIN
RG 100
Figure 48. OUT2 Shorted to Ground, Square Wave Is OUT1, RF = 1 k, RG = 222
-IN 100
10
1/2 AD815
7
OUT 2
9
11
100 90
0.1 F -15V
OUT 1
10 F
Figure 51. Fully Differential Operation
Creating Differential Signals
OUT 2
10 0%
5V
5ms
If only a single ended signal is available to drive the AD815 and a differential output signal is desired, several circuits can be used to perform the single-ended-to-differential conversion. One circuit to perform this is to use a dual op amp as a predriver that is configured as a noninverter and inverter. The circuit shown in Figure 52 performs this function. It uses an AD826 dual op amp with the gain of one amplifier set at +1 and the gain of the other at -1. The 1 k resistor across the input terminals of the follower makes the noise gain (NG = 1) equal to the inverter's. The two outputs then differentially drive the inputs to the AD815 with no common-mode signal to first order.
Figure 49. OUT1 Shorted to Ground, Square Wave Is OUT2, RF = 1 k, RG = 222
Parallel Operation
To increase the drive current to a load, both of the amplifiers within the AD815 can be connected in parallel. Each amplifier should be set for the same gain and driven with the same signal. In order to ensure that the two amplifiers share current,
-12-
REV. C
AD815
+15V +15V 0.1 F
3 8
+15V
0.1 F
100
4 8
10 F
1k
2
1/2 AD826 1k
1 5
1/2 AD815
VIN
6
4
8
AMP 1
5
1/2 AD815
6
RF 499 RL RF 499
RF1 402 RL RF2 499 VOUT
RG 100 1k
6
RG 100
1k 1/2 AD826
4 10 7
5
100 0.1 F
11
1/2 AD815
7
10
9
AMP 2
11
1/2 AD815
7
9
-15V -15V
0.1 F
10 F
-15V
Figure 52. Differential Driver with Single-Ended Differential Converter
Figure 54. Direct Single-Ended-to-Differential Conversion
Another means for creating a differential signal from a singleended signal is to use a transformer with a center-tapped secondary. The center tap of the transformer is grounded and the two secondary windings are connected to obtain opposite polarity signals to the two inputs of the AD815 amplifiers. The bias currents for the AD815 inputs are provided by the center tap ground connection through the transformer windings. One advantage of using a transformer is its ability to provide isolation between circuit sections and to provide good commonmode rejection. The disadvantages are that transformers have no dc response and can sometimes be large, heavy, and expensive. This circuit is shown in Figure 53.
+15V
Amp 1 has its + input driven with the input signal, while the + input of Amp 2 is grounded. Thus the - input of Amp 2 is driven to virtual ground potential by its output. Therefore Amp 1 is configured for a noninverting gain of five, (1 + RF1/RG), because R G is connected to the virtual ground of Amp 2's - input. When the + input of Amp 1 is driven with a signal, the same signal appears at the - input of Amp 1. This signal serves as an input to Amp 2 configured for a gain of -5, (-RF2/R G). Thus the two outputs move in opposite directions with the same gain and create a balanced differential signal. This circuit can work at various gains with proper resistor selection. But in general, in order to change the gain of the circuit, at least two resistor values will have to be changed. In addition, the noise gain of the two op amps in this configuration will always be different by one, so the bandwidths will not match. A second circuit that has none of the disadvantages mentioned in the above circuit creates a differential output voltage feedback op amp out of the pair of current feedback op amps in the AD815. This circuit, drawn in Figure 55, can be used as a high power differential line driver, such as required for ADSL (asymmetrical digital subscriber loop) line driving. Each of the AD815's op amps is configured as a unity gain follower by the feedback resistors (RA). Each op amp output also drives the other as a unity gain inverter via the two RBs, creating a totally symmetrical circuit.
100
4 8
0.1 F
10 F
50 50 200
1/2 AD815
5
6
1k RL
1k
10
100
11
1/2 AD815
7
9
0.1 F -15V
10 F
Figure 53. Differential Driver with Transformer Input
Direct Single-Ended-to-Differential Conversion
Two types of circuits can create a differential output signal from a single-ended input without the use of any other components than resistors. The first of these is illustrated in Figure 54.
If the + input to Amp 2 is grounded and a small positive signal is applied to the + input of Amp 1, the output of Amp 1 will be driven to saturation in the positive direction and the output of Amp 2 driven to saturation in the negative direction. This is similar to the way a conventional op amp behaves without any feedback.
REV. C
-13-
AD815
~20pF
Twelve Channel Video Distribution Amplifier
+15V RI 499
4 8
RF 499 0.1 F
6
The high current of the AD815 enables it to drive up to twelve standard 75 reverse terminated video loads. Figure 56 is a schematic of such an application.
10 F 50 (OPTIONAL)
VCC
VIN
AMP1
5
1/2 AD815
250 (50 ) (OPTIONAL)
RA 499 RA 499
RB 499 RB 499 100
The input video signal is terminated in 75 and applied to the noninverting inputs of both amplifiers of the AD815. Each amplifier is configured for a gain of two to compensate for the divide-by-two feature of each cable termination. Six separate 75 resistors for each amplifier output are used for the cable back termination. In this manner, all cables are relatively independent of each other and small disturbances on any cable will not have an effect on the other cables. When driving six video cables in this fashion, the load seen by each amplifier output is resistive and is equal to 150 /6 or 25 . The differential gain is 0.05% and the differential phase is 0.45.
+15V 0.1 F 10 F 12 75
10
AMP2
11
1/2 AD815
7
50
9
VCC 0.1 F 10 F
-15V
Figure 55. Single-Ended-to-Differential Driver
499
If a resistor (RF) is connected from the output of Amp 2 to the + input of Amp 1, negative feedback is provided which closes the loop. An input resistor (RI) will make the circuit look like a conventional inverting op amp configuration with differential outputs. The inverting input to this dual output op amp becomes Pin 4, the positive input of Amp 1. The gain of this circuit from input to either output will be RF/ RI. Or the single-ended-to-differential gain will be 2 x RF/RI. The differential outputs can be applied to the primary of a transformer. If each output can swing 10 V, the effective swing on the transformer primary is 40 V p-p. The optional capacitor can be added to prevent any dc current in the transformer due to dc offsets at the output of the AD815.
499
5 8 6 4
100
VIDEO IN 75 100
11
AD815
12 VIDEO OUT TO 75 CABLES
9 10 7
499
499 0.1 F -15V 10 F
Figure 56. AD815 Video Distribution Amp Driving 12 Video Cables
-14-
REV. C
AD815
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
24-Lead Thermally Enhanced SOIC (RB-24)
0.6141 (15.60) 0.5985 (15.20)
24 13
1
12
PIN 1
0.1043 (2.65) 0.0926 (2.35)
0.4193 (10.65) 0.3937 (10.00)
0.2992 (7.60) 0.2914 (7.40)
0.0291 (0.74) x 45 0.0098 (0.25)
0.0118 (0.30) 0.0040 (0.10)
0.0500 (1.27) BSC
8 0.0201 (0.51) 0 SEATING 0.0125 (0.32) 0.0130 (0.33) PLANE 0.0091 (0.23)
0.0500 (1.27) 0.0157 (0.40)
REV. C
-15-
AD815 Revision History
Location 4/05--Data Sheet changed from REV. B to REV. C. Page
Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Changes to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Deleted VR-15, Y-15, and YS-15 Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal Changes to Power Considerations section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Deleted Figure 45 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Deleted Figures 55, 56, 57, and 58 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
C00868-0-4/05(C)
Changes to Figure numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
-16-
REV. C


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